Ajith Padyana Assistant. Professor
Department of Mathematics and Computer Science
Sri Sathya Sai Institute of Higher Learning, Muddenahalli Campus
                                                                                                                                                          -Bhagawan Sri Sathya Sai Baba |
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Currently, I am holding the position of Assistant.Professor in Sathya Sai Institute of Higher Learning, Muddenhalli Campus. I describe myself as a constant learner from both younger ones and elder ones. I like to do lot of innovative things in various aspects of life. I love my students for there innocence and there dedication towards whatever they do.
Education
B.Sc.(hons) ( Mathematics) 2002-2005, Sri Sathya Sai Institute of Higher Learning, India,
M. Sc( Mathematics ) 2005-2007, Sri Sathya Sai Institute of Higher Learning, India,
M Tech( CS), 2007-2009, Sri Sathya Sai Institute of Higher Learning, India,
Currently (PhD) in CS- 2010 - till date , Sri Sathya Sai Institute of Higher Learning, India,
Course |
Year of passing |
Grade (5 point scale) |
B.Sc (Maths) |
2005 |
4.5 |
M.Sc (Maths) |
2007 |
4.7 |
M.Tech( CS) |
2009 |
4.9 |
Research Interests
- Parallel Computing
- Computer Architecture
- Image Processing
Published Papers
Conference Papers
- D. Sathynvesh, Kali Uday, Ajith Padyana, Pallav Kumar Baruah GenCodex - A Novel Algorithm for Compressing DNA sequences on Multi-cores and GPUs in 5th Student Research Symposium in 19th IEEE International Conference on High Performance Computing - 2012, Pune, December 2012
- Arka Ghosh, U. Sai Krishna, Ajith Padyana, Venkatachalam Chandrasekaran A Parallel Implementation of Missing Data Prediction using Principal Component Analysis in 5th Student Research Symposium in 19th IEEE International Conference on High Performance Computing - 2012, Pune, December 2012
- Ajith Padyana, C.D Sudheer, Pallav Kumar Baruah, Ashok Srinvasan High Throughput Compression of Floating point numbers in GPUs in second IEEE International Conference on Parallel, Distributed and Grid Computing - 2012 Himachal Pradesh, December 2012
- Ajith Padyana, Praveen. Krishna Kumar, Pallav Kumar Baruah, Raghunath Sarma,
Performance Enhancement of Hausdorff Metric Based Corner Detection method using GPU in High Performance Computing Conference held in Goa, Dec 2010
- Ajith Padyana, T. V. Sivakumar, Pallav Kumar Baruah,
Fast Floating Point Compression in Cell BE Processor in High Performance Computing Conference held Bangalore, Dec 2008
Important Conferences in HPC
Professional Activities
Part of editorial board of bi-yearly Departmental Newsletter
Hobbies
- Playing
- Browsing
- Reading good stuff
- last but not least sleeping !!!!!
Invited Talks
- HeGaPa2012 on Optimizations in GPUs
- HyPack2013 on Performance Enhancements in GPUs
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